High density dynamic random access memories are well known in the art. An article entitled "A Survey of High Density Dynamic RAM Cell Concepts" published in the IEEE Transactions on Electron Devices, Volume ed.-26, No. 6, June 1979, describes a variety of dynamic RAM cell concepts and compares these concepts to the industry's standard N-channel, MOS Dynamic RAM Cell. The prior art DRAMS basically store information in the form of the presence or absence of a charge packet stored on a single capacitor accessed by a single transistor. In very high density DRAM arrays, the geometrical area of the storage capacitor is very small, making detection of the presence or absence of the charge packet exceedingly difficult. For example, state of the art DRAM arrays utilize sense amplifiers which must be capable of sensing signals of less than 100 millivolts magnitude. This makes such arrays extremely susceptible to process variations as well as to spurious signals and external influences such as alpha particle radiation.